Index: vtcross/branches/sriram/rfic/db_rfic.cc
===================================================================
--- vtcross/branches/sriram/rfic/db_rfic.cc	(revision 483)
+++ vtcross/branches/sriram/rfic/db_rfic.cc	(revision 500)
@@ -328,6 +328,6 @@
 	bool set_tx_gain(float);
 	void set_fb_gain(float);
-	int* calc_freq_vars(double,double);
-	int* calc_phase_vars(double,double,double);
+	void calc_freq_vars(double,double,int []);
+	void calc_phase_vars(double,double,double,int[]);
 	struct freq_result_t set_rx_freq(double);
 	struct freq_result_t set_tx_freq(double);
@@ -870,5 +870,5 @@
 rfic::send_reg(int reg_no,int dat )
 {
-    std::cout<<"value to be written on reg no "<<reg_no<<"is "<<dat<<std::endl;
+    
     // dat is the data to write to register 0
     //spi_enable is the spi enables
@@ -878,19 +878,23 @@
     //Write 8 bit register
     //Set header
-    int hdr = int((reg_no << 1) & 0x7fff);
-    std::string abc = "105";
-    //Set byte of write data
-    //char c = (char)((dat & 0xff));
-    //char * d = &c;
-
+
+    std::cout<<"db_rfic.cc: Register no: "<<reg_no<<" ,Value: "<<dat<<std::endl;
+    //std::cout<<"db_rfic.cc:Value on the register before writing"<<get_reg(reg_no)<<std::endl;
+    
+    int hdr = int((reg_no << 1) & 0x7fff); //since the 14 bit address lies from bits 1-14..0th bit is for auto increment..15th bit is for read/write
+    char c[1];
+    c[0] = (char)(dat&0xff);
+    std::string s(c, 1); //s is the data to be sent to the register
+    
     bool check;
-    std::cout<<"\nValue on the register before writing\n"<<get_reg(reg_no)<<std::endl;
-    check = usrp()->_write_spi(hdr, d_spi_enable, d_spi_format, abc);
-    if (check)
-	std::cout<<"success"<<std::endl;
-    else
-	std::cout<<"fail"<<std::endl;
-    std::cout<<"\nValue on the register after ******** writing\n ***"<<get_reg(reg_no)<<"***"<<std::endl;
     
+    check = usrp()->_write_spi(hdr, d_spi_enable, d_spi_format, s);
+    //if (check)
+	//std::cout<<"db_rfic.cc: Write successful"<<std::endl; //Do not trust variable check!
+    //else
+	//std::cout<<"db_rfic.cc: Write failed"<<std::endl;
+    //std::cout<<"db_rfic.cc:Value on the register after ******** writing\n ***"<<get_reg(reg_no)<<"***"<<std::endl;
+    //if(reg_no == 60)
+	//get_reg(reg_no);
 }
 
@@ -899,6 +903,5 @@
 {
 
-	std::cout<<"inside get reg and register to be read is "<<reg_num<<std::endl;
-	//Returns a vector containing the information in the first 320 registers in integer form
+    //Returns a vector containing the information in the first 320 registers in integer form
     //dat is the data to write to register 0
     //spi_enable is the spi enables
@@ -906,20 +909,21 @@
     //spi_format_no_header is the spi format, with no header
     //u is the instance of the USRP
+    
     int hdr = 0;
     int dat = 0;
-    //Set byte of write data
-    //char c = (char)((dat & 0xff));
-    //char * d = &c;
-    std::string d  = "0";
+    char c[1];
+    c[0] = (char)(dat&0xff);
+    std::string s(c, 1); //s is the data to be sent to the register
+    
     bool check;
-    check = usrp()->_write_spi(hdr, d_spi_enable, d_spi_format, d);
+    check = usrp()->_write_spi(hdr, d_spi_enable, d_spi_format, s);
     
     std::string r; //string to be read from the register
-    r = usrp()->_read_spi(0, d_spi_enable, d_spi_format_no_header, 64);
+    r = usrp()->_read_spi(0, d_spi_enable, d_spi_format_no_header, 64); //Starts reading from register 0 since the previous write is on register 0
     r  = r + usrp()->_read_spi(0, d_spi_enable, d_spi_format_no_header, 64);
     r  = r + usrp()->_read_spi(0, d_spi_enable, d_spi_format_no_header, 64);
     r  = r + usrp()->_read_spi(0, d_spi_enable, d_spi_format_no_header, 64);
     r  = r + usrp()->_read_spi(0, d_spi_enable, d_spi_format_no_header, 64);
-    std::cout<<"the contents of all registers are\n***"<<r<<"*****"<<std::endl;
+    std::cout<<"db_rfic.cc: contents of all registers \n***"<<r<<"***"<<std::endl;
     char read_val = (char)r[reg_num];
     return read_val;
@@ -2378,5 +2382,5 @@
 }
 
-int* rfic :: calc_freq_vars(double _Fclk,double _Fout){
+void rfic :: calc_freq_vars(double _Fclk,double _Fout,int ret_arr[]){
 	//
 	//@param Fclk: Clock frequency of board (Hz)
@@ -2394,5 +2398,5 @@
 	float NpR;
 	int data1,data2,data3,temp,Ngt;
-	int ret_arr[6];
+	//int ret_arr[6];
 	if (_Fout > _Fclk / 4){
 		NpR = pow(2,-26) * floor(pow(2,26) * _Fclk / _Fout);
@@ -2408,8 +2412,10 @@
 	}
 
-	Ngt = data1;//need to speak to terry about this variable..is this a local variable or supposed to be a class attribute
+	Ngt = data1;
+
 	ret_arr[0]= Ngt;
 	NorNdiv4 = data2;
 	ret_arr[1]=NorNdiv4;
+	                
 	RorFrNpRdiv4_25to18 = data3 >> 18;
 	ret_arr[2]=RorFrNpRdiv4_25to18;
@@ -2422,9 +2428,8 @@
 	RorFrNpRdiv4_1to0 = data3 % int(pow(2,2));
 	ret_arr[5]=RorFrNpRdiv4_1to0;
-
-	return ret_arr;
-}
-
-int* rfic :: calc_phase_vars(double _Fclk, double _Fout,double phsh){
+        	
+}
+
+void rfic :: calc_phase_vars(double _Fclk, double _Fout,double phsh,int ret_arr[]){
 	//
 	//@param _Fclk: Clock frequency of board (Hz)
@@ -2445,5 +2450,5 @@
 	float mod1,tmp,NpR,NpR_ph;
 	int data1,data2,data3,temp,Ngt_phsh,RorFrNpRdiv4_17to10_phsh,RorFrNpRdiv4_9to2_phsh,RorFrNpRdiv4_25to18_phsh,RorFrNpRdiv4_1to0_phsh;
-	int ret_arr[6];
+	
 	if (_Fout <= _Fclk / 4){
 		mod1 = phsh - 360 * floor(phsh / 360);
@@ -2476,4 +2481,5 @@
 	Ngt_phsh = data1;
 	ret_arr[0]=Ngt_phsh;
+
 	NorNdiv4_phsh = data2;
 	ret_arr[1]=NorNdiv4_phsh;
@@ -2489,5 +2495,4 @@
 	ret_arr[5]=RorFrNpRdiv4_1to0_phsh;
 
-	return ret_arr;
 }
 
@@ -2744,12 +2749,13 @@
 
 	Foutrx = target_freq;
-	int * ret_arr;
-	ret_arr= calc_freq_vars(Fclk, try_freq);
+	int  ret_arr[6];
+	calc_freq_vars(Fclk, try_freq,ret_arr);
 	Ngt3_3 = ret_arr[0];
-	NorNdiv4_3= ret_arr[1];
-	RorFrNpRdiv4_25to18_3= ret_arr[2];
-	RorFrNpRdiv4_17to10_3= ret_arr[3];
-	RorFrNpRdiv4_9to2_3= ret_arr[4];
-	RorFrNpRdiv4_1to0_3= ret_arr[5];
+        NorNdiv4_3= ret_arr[1];
+        RorFrNpRdiv4_25to18_3= ret_arr[2];
+        RorFrNpRdiv4_17to10_3= ret_arr[3];
+        RorFrNpRdiv4_9to2_3= ret_arr[4];
+        RorFrNpRdiv4_1to0_3= ret_arr[5];
+        
 
 	set_reg_104();
@@ -2971,6 +2977,6 @@
 	Fouttx = target_freq;
 
-	int * ret_arr;
-	ret_arr= calc_freq_vars(Fclk, try_freq);
+	int  ret_arr[6];
+	calc_freq_vars(Fclk, try_freq,ret_arr);
 	Ngt3 = ret_arr[0];
 	NorNdiv4= ret_arr[1];
@@ -3160,6 +3166,6 @@
 	}
 	Foutfb = target_freq;
-	int * ret_arr;
-	ret_arr= calc_freq_vars(Fclk, try_freq);
+	int ret_arr[6];
+	calc_freq_vars(Fclk, try_freq,ret_arr);
 	Ngt3_2 = ret_arr[0];
 	NorNdiv4_2= ret_arr[1];
@@ -3200,6 +3206,6 @@
 		synth_freq = Foutrx / 4;
 
-	int * ret_arr;
-	ret_arr= calc_phase_vars(Fclk, synth_freq,phsh);
+	int  ret_arr[6];
+	calc_phase_vars(Fclk, synth_freq,phsh,ret_arr);
 	Qu_tx_Ngt3_3 = ret_arr[0];
 	NorNdiv4_phsh_3= ret_arr[1];
@@ -3238,6 +3244,6 @@
 		synth_freq = Fouttx / 4;
 
-	int * ret_arr;
-	ret_arr= calc_phase_vars(Fclk, synth_freq,phsh);
+	int  ret_arr[6];
+	calc_phase_vars(Fclk, synth_freq,phsh,ret_arr);
 	Qu_tx_Ngt3_3 = ret_arr[0];
 	NorNdiv4_phsh_3= ret_arr[1];
@@ -3276,6 +3282,6 @@
 
 	
-	int * ret_arr;
-	ret_arr= calc_phase_vars(Fclk, synth_freq,phsh);
+	int  ret_arr[6];
+	calc_phase_vars(Fclk, synth_freq,phsh,ret_arr);
 	Qu_tx_Ngt3_3 = ret_arr[0];
 	NorNdiv4_phsh_3= ret_arr[1];
